The technical field of the invention is chemical vapor deposition of materials and, in particular, the formation of porous materials for use in electronic devices and other applications.
In the attempt to increase processor speeds and to make more powerful microelectronic devices, semiconductor manufacturers seek to reduce the size of microchips. However, as chip sizes decrease, their circuitry gets closer together and the operating frequencies increase, which dramatically amplifies the problems of electrical interference between circuit elements, known as cross-talk. Additionally, as transistors shrink and the total amount of interconnect circuitry continues to increase, delays in the wiring become more important to circuit performance. Intermetal dielectric materials, which provide insulation between circuits, also affect the capacitance of the circuit and contribute to interconnect delays. Thus, improved dielectric materials with lower K values are desired to reduce the noise, preserve the signal, conserve power, and reduce the interconnect delay (ICD) so that microelectronics can continue to become both faster and smaller.
Dielectric materials should have excellent thermal stability and mechanical properties without compromising their insulating barrier properties. Current semiconductor processes rely heavily on the use of silicon dioxide (SiO2) as the interlevel dielectric material, which has a dielectric constant of approximately 4.0. Few materials are currently known that have dielectric constants less than 2.0 and are compatible with semiconductor manufacturing requirements, such as thermal stability of at least 400° C. Polytetrafluoroethylene (PTFE), for example, has a low dielectric constant, but is not thermally stable above 300–350° C., which restricts its use in integrated circuits. The industry has only recently begun explore alternative dielectrics.
One approach to finding better dielectric materials has been to introduce nanometer sized holes into a material with an already low dielectric constant, such as SiO2 or poly(methylsilsesquioxane). Since air has κ of 1.0, the addition of pores decrease the overall dielectric constant of the porous material as a function of the level of porosity or density. Porous nanostructured materials find important uses in a broad range of fields including photonics, catalysis, and microelectronics. However, many of the current methods for the production of porous films utilize wet chemistry steps and require a spin-on process to deposit the dielectric material. The use of a spin-on process to fabricate porous thin films has numerous disadvantages, including incompatibility with the other vacuum-based processes used in semiconductor fabrication, environmentally dangerous reagents, and production of large amounts of solvent/material waste. In addition, studies have shown that low dielectric materials that are formed using CVD are mechanically more robust and produce better results when used in chemical mechanical polishing (CMP) and flip chip bonding. Hence, methods of producing porous dielectric materials that are compatible with the CVD processes are needed.
Thus, as electronics continue to shrink in size and increase in power, there is an expanding need for new methods of making ultra-low dielectric materials that can be integrated into conventional integrated circuit fabrication procedures while retaining their thermal stability and insulation abilities.